1. Field of the Invention
The invention relates to an apparatus for the fast generation of large quantities of test data words in a test facility with which electronic assemblies (units under test) are tested and which, for this purpose, allocates the test data to its terminal elements and to the terminal elements of the unit under test bit-by-bit.
2. Description of the Prior Art
Electronic assemblies such as, for example, card modules contain memory and microprocessor modules to an increasing degree. In accord with the increasing complexity of such assemblies, a great number of test bit patterns are required for testing them for accuracy. These test bit patterns must either be stored in the test facility which is employed for testing the assemblies or must be generated with the assistance of a computer. Subsequently, the test bit patterns must be allocated to the terminal elements of the card module to be tested. When differently constructed card modules were thereby to be tested, a change in the allocation of the test bit patterns to the terminal elements of the unit under test is required. It is thus necessary to provide special adapter devices at the output of the test facility for each type of card module to be tested.
Such conventional test facilities thus have the disadvantage that great quantities of data are required and considerable computer times are needed for generating the required test bit patterns which can be combined to form a test data word. Further, long testing times per unit under test are required. Finally, a great number of adapter devices are required in order to be able to test different types of card modules.